Driving 224Gbps System Design with Next-Gen TDR Solutions
Accounting for Tight Design Tolerances and Rapid Industry Growth
Impedance mismatches, skew, and discontinuities at 224Gbps/lane are more pronounced than ever before. Any of these discrepancies can compromise Insertion loss, Signal-to-Noise Ratio (SNR), and contribute to complex troubleshooting, creating much tighter margins for error in System design. Being able to properly account for these constraints will result in a faster time to market for 224Gbps systems.
This MultiLane webinar explores the challenges of host design where tight margins must be considered, and provides an overview of using TDR analysis to accelerate fault detection and troubleshooting in production testing: streamlining complexity with high-throughput solutions.
Presenter: Nour Sakhr (Field Application Engineer, MultiLane)
You are welcome to submit questions during the webinar. If possible, please indicate which the speaker or company to whom your question is directed.